Sr. ASIC Design Verification Manager Location: Beijing We are currently looking for a ASIC Design Verification Manager who will be part of a team working on the future integration of real SOC (CPU, GPU, Multi Media …) into a single Fusion processor in 16nm technology and beyond. The successful candidate will play a key role in driving many of the key DV architectural and in depth technical aspects of various projects and perform the following duties: · A multidisciplinary function, working in close collaboration with the design engineering teams and managers and directors on the various efforts involved in the definition and implementation of various projects and scoping development efforts and project schedules. · Responsible for the overall chip verification, in addition to the possibility of direct responsibility for the architecture of specific IP blocks or functions, depending on any specific area of expertise the candidate might have. · Interacting with and guiding a wide variety of internal and external design verification development teams, DV methodology, silicon IP and tool vendors. · Work with senior management, architects, and the design and DV teams across sites to contribute in definition of ASIC products specifications, feature definition and architecture. 點擊申請職位:http://www.moore.ren/job/detail.htm?jobId=1200355&invitecode=1f497054-685a-4ac6-8970-54685a0ac6d2 ![]() 摩爾精英,專注半導體招聘,更多半導體高薪職位 請掃描二維碼 |